diff --git a/board/esd/otc570/otc570.c b/board/esd/otc570/otc570.c
index 410d8b4..15faa16 100644
--- a/board/esd/otc570/otc570.c
+++ b/board/esd/otc570/otc570.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2010
+ * (C) Copyright 2010-2011
  * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
  * esd electronic system design gmbh <www.esd.eu>
  *
@@ -27,7 +27,7 @@
  */
 
 #include <common.h>
-#include <asm/arch/at91sam9263.h>
+#include <asm/io.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
@@ -35,14 +35,14 @@
 #include <asm/arch/at91_matrix.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
-#include <atmel_lcdc.h>
-#include <lcd.h>
 #include <netdev.h>
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
+#ifdef CONFIG_LCD
+# include <atmel_lcdc.h>
+# include <lcd.h>
+# ifdef CONFIG_LCD_INFO
+#  include <nand.h>
+#  include <version.h>
+# endif
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -73,8 +73,8 @@
 static void otc570_nand_hw_init(void)
 {
 	unsigned long csa;
-	at91_smc_t 	*smc 	= (at91_smc_t *) AT91_SMC0_BASE;
-	at91_matrix_t 	*matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+	at91_smc_t	*smc 	= (at91_smc_t *) ATMEL_BASE_SMC0;
+	at91_matrix_t	*matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
 
 	/* Enable CS3 */
 	csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -93,8 +93,8 @@
 		&smc->cs[3].cycle);
 	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
 		AT91_SMC_MODE_EXNW_DISABLE |
-		       AT91_SMC_MODE_DBW_8 |
-		       AT91_SMC_MODE_TDF_CYCLE(2),
+		AT91_SMC_MODE_DBW_8 |
+		AT91_SMC_MODE_TDF_CYCLE(3),
 		&smc->cs[3].mode);
 
 	/* Configure RDY/BSY */
@@ -108,9 +108,9 @@
 #ifdef CONFIG_MACB
 static void otc570_macb_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 	/* Enable clock */
-	writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
+	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
 	at91_macb_hw_init();
 }
 #endif
@@ -123,7 +123,7 @@
  */
 static void otc570_ethercat_hw_init(void)
 {
-	at91_smc_t 	*smc1 	= (at91_smc_t *) AT91_SMC1_BASE;
+	at91_smc_t	*smc1 	= (at91_smc_t *) ATMEL_BASE_SMC1;
 
 	/* Configure SMC EBI1_CS0 for EtherCAT */
 	writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) |
@@ -155,7 +155,7 @@
 	.vl_sync =		ATMEL_LCDC_INVLINE_INVERTED |
 				ATMEL_LCDC_INVFRAME_INVERTED,
 
-	.vl_bpix =		3,	/* Bits per pixel, 0 = 1bit, 3 = 8bit */
+	.vl_bpix =		LCD_BPP,/* Bits per pixel, 0 = 1bit, 3 = 8bit */
 	.vl_tft =		1,	/* 0 = passive, 1 = TFT */
 	.vl_vsync_len =		1,	/* Length of vertical sync in NOL */
 	.vl_upper_margin =	35,	/* Idle lines at the frame start */
@@ -164,22 +164,22 @@
 	.vl_left_margin =	112,	/* Idle cycles at the line beginning */
 	.vl_right_margin =	1,	/* Idle cycles at the end of the line */
 
-	.mmio =			AT91SAM9263_LCDC_BASE,
+	.mmio =			ATMEL_BASE_LCDC,
 };
 
 void lcd_enable(void)
 {
-	at91_set_pio_value(AT91_PIO_PORTA, 30, 0);  /* power up */
+	at91_set_pio_value(AT91_PIO_PORTA, 30, 0); /* power up */
 }
 
 void lcd_disable(void)
 {
-	at91_set_pio_value(AT91_PIO_PORTA, 30, 1);  /* power down */
+	at91_set_pio_value(AT91_PIO_PORTA, 30, 1); /* power down */
 }
 
 static void otc570_lcd_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* LCDVSYNC */
 	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* LCDHSYNC */
@@ -206,8 +206,7 @@
 	at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDD23 */
 	at91_set_pio_output(AT91_PIO_PORTA, 30, 1);	/* PCI */
 
-	writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer);
-	gd->fb_base = CONFIG_OTC570_LCD_BASE;
+	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
 }
 
 #ifdef CONFIG_LCD_INFO
@@ -225,8 +224,7 @@
 		nand_size += nand_info[i].size;
 
 	lcd_printf("\n%s\n", U_BOOT_VERSION);
-	lcd_printf("%s CPU at %s MHz\n", CONFIG_SYS_AT91_CPU_NAME,
-					strmhz(temp, get_cpu_clk_rate()));
+	lcd_printf("CPU at %s MHz\n", strmhz(temp, get_cpu_clk_rate()));
 	lcd_printf("  %ld MB SDRAM, %ld MB NAND\n",
 		dram_size >> 20,
 		nand_size >> 20 );
@@ -239,8 +237,9 @@
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27));
+	gd->ram_size = get_ram_size(
+		(void *)CONFIG_SYS_SDRAM_BASE,
+		CONFIG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
@@ -248,7 +247,7 @@
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00);
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
 #endif
 	return rc;
 }
@@ -257,13 +256,14 @@
 {
 	char str[32];
 
-	puts("Board: esd ARM9 HMI Panel - OTC570");
+	puts("Board            : esd ARM9 HMI Panel - OTC570");
 	if (getenv_f("serial#", str, sizeof(str)) > 0) {
 		puts(", serial# ");
 		puts(str);
 	}
-	printf("\nHardware-revision: 1.%d\n", get_hw_rev());
-	printf("Mach-type: %lu\n", gd->bd->bi_arch_number);
+	printf("\n");
+	printf("Hardware-revision: 1.%d\n", get_hw_rev());
+	printf("Mach-type        : %lu\n", gd->bd->bi_arch_number);
 	return 0;
 }
 
@@ -297,12 +297,12 @@
 int misc_init_r(void)
 {
 	char		str[64];
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_pio_output(AT91_PIO_PORTA, 29, 1);
 	at91_set_a_periph(AT91_PIO_PORTA, 26, 1);	/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTA, 27, 0);	/* RXD0 */
-	writel(1 << AT91SAM9263_ID_US0,	&pmc->pcer);
+	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
 	/* Set USART_MODE = 1 (RS485) */
 	writel(1, 0xFFF8C004);
 
@@ -325,37 +325,49 @@
 			at91_set_pio_output(AT91_PIO_PORTA, 29, 0);
 		}
 	}
+#ifdef CONFIG_LCD
 	printf("Display memory address: 0x%08lX\n", gd->fb_base);
+#endif
 
 	return 0;
 }
 #endif /* CONFIG_MISC_INIT_R */
 
-int board_init(void)
+int board_early_init_f(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
-	/* Peripheral Clock Enable Register */
-	writel(	1 << AT91SAM9263_ID_PIOA |
-		1 << AT91SAM9263_ID_PIOB |
-		1 << AT91SAM9263_ID_PIOCDE |
-		1 << AT91SAM9263_ID_TWI |
-		1 << AT91SAM9263_ID_SPI0 |
-		1 << AT91SAM9263_ID_LCDC |
-		1 << AT91SAM9263_ID_UHP,
+	/* enable all clocks */
+	writel((1 << ATMEL_ID_PIOA) |
+		(1 << ATMEL_ID_PIOB) |
+		(1 << ATMEL_ID_PIOCDE) |
+		(1 << ATMEL_ID_TWI) |
+		(1 << ATMEL_ID_SPI0) |
+#ifdef CONFIG_LCD
+		(1 << ATMEL_ID_LCDC) |
+#endif
+		(1 << ATMEL_ID_UHP),
 		&pmc->pcer);
 
+	at91_seriald_hw_init();
+
 	/* arch number of OTC570-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_OTC570;
 
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	return 0;
+}
 
-	at91_serial_hw_init();
+int board_init(void)
+{
+	/* initialize ET1100 Controller */
+	otc570_ethercat_hw_init();
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
 #ifdef CONFIG_CMD_NAND
 	otc570_nand_hw_init();
 #endif
-	otc570_ethercat_hw_init();
 #ifdef CONFIG_HAS_DATAFLASH
 	at91_spi0_hw_init(1 << 0);
 #endif